HiSilicon HI3559A Core Board
海思 HI3559A Core Board,Claimed100% Domestic/In-House,HI3559AV100,Complete Minimum System/Rich I/O,Custom Carrier Speeds Projects/Reduces R&D-Production Cost,Carrier Design Provided.
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Overview
Specifications
| Parameter | Value |
|---|---|
| Main Processor ARM SOC | HiSilicon HI3559AV100 |
| Storage LPDDR4X | Supports Two Chips, Customizable Capacity, Default Total 4GB |
| Storage EMMC | Customizable Capacity, Default 64GB |
| Processor | Dual ARM CortexA73@1.6GHz + Dual ARM CortexA53@1.2GHz |
| Computing Performance [INT8] | Dual-Core NNIE, Computing Power up to 4Tops@INT8 |
| Video Encoding and Decoding | Supports up toH264/H.2657680×4320@30fps or H.264/H.2653840×2160@120fps;JPEG Decoding up to7680×4320@15fps |
| Video Input Interface | 8 Sensor Inputs;Maximum32M7680×4320 or36M6000×6000;8/10/12/14Bit RGB Bayer DC-Timing Video up to150MHz;BT.601/BT.656/BT.1120;Serial Sensor up to16-Lane MIPI/LVDS/Sub-LVDS/HiSPi/SLVS-EC |
| Video Output | HDMI2.0 Output up to8K7680×4320@30fps;6/8/16/24bit RGB Digital LCD up to1920×1080@60fps;4-Lane MIPI DSI up to2.5Gbps/Lane |
| Audio Interface [Source Figure Interface i2S Retained Literally, Original Baseline Digit 2 Preserved] | Integrated Audio Codec,16bit Voice I/O;i2S and External Audio Codec Connection |
| Peripheral Interfaces | 2 Gigabit Ethernet Interfaces; Multiple UART, I2C, SPI, GPIO, USB and PCIE Interfaces |
| Temperature Grade | -40~+80 °C |
| Supply Voltage | DC5 |
| Power Consumption | Peak <8 |
| Volume [Source Has No Overall Unit; Board-to-Board Connector Mated Height 3mm Not Used to Supply Overall mm] | 50×80×8.8 |
| Technical Support | Development-Board Hardware and Software Technical Support and Customized Specialized Services Accelerate Product Development |
Applications
Datasheet
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