DIP Smart Accelerated Traffic-Capture Network Card: High-Performance Capture Solution Based on an FPGA Programmable Network Card FW-uNIC690 （验证Platform）
FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
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Overview
Specifications
| Parameter | Value |
|---|---|
| Key Features | Zero-Loss Packet Capture for All Frame Sizes; Line-Rate Packet Transmission for All Frame Sizes; Nanosecond-Precision Timestamps; Packet Slicing, Deduplication and Other Preprocessing; Large Onboard Memory Buffer Ensures Packet Transmission during Congestion; Multiport Traffic with the Same Source and Destination Is Delivered to X86 Multicore Queues |
| Network Interface | 2/4 *10GE/GE（SFP+）；2*100GE/40GE(QSFP28/QSFP+) |
| Host Queue | 16 Queues; Multiport Traffic with the Same Source and Destination Is Load-Balanced across Queues |
| Packet Support | Supports 2 VLAN Layers and 4 MPLS Label Layers; VxLAN, GRE/GTP/L2TP/PPTP/PPPOE and Other Tunnel Packets; IPv4, IPv6, ICMP, SCTP and Others |
| Load Strategy | SIP, SIP+SP, DIP, DIP+DP, SDIP, SDIP+SDP, VLAN, ROUND ROBIN, Broadcast and Other Policies |
| Matching Conditions | Source IP, Destination IP, Protocol Type, Source Port, Destination Port; VLAN ID; Input Interface Number; Packet Length; MPLS Label; Inner or Outer Layer Selectable When Matching Tunnel Packets |
| Matching Action | Discard; Forward to Port; Forward to Host (Receive Queue) |
| Supported Systems | Linux |
| Interface API | uuSDK |
| Chip Type [Product Series] | FPGA Chip |
| Network Interface [Product Series] | 2*100GE，2*40GE |
| Main Unit Interface [Product Series] | PCIE3.0*8 |
| Memory [Product Series] | 8GB DDR3 |
| Dimensions [Product Series] | 160MM*210MM |
| Main Chip [Product Series] | Xilinx 690T or Domestic FPGA |
| Heat Dissipation Method [Product Series] | Active Cooling by Onboard Fan |
| Application Scenarios [Product Series] | Suitable for High-Performance Traffic Capture and Forwarding with Relatively Simple Services and High Heat-Dissipation Requirements, Such as Session Flow-Table Accelerated Forwarding, SDH Link Protocol Conversion and High-Performance Packet Transmit/Receive RSS Distribution |
Key Features
Datasheet
Supplier Information
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FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
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FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
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FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
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FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
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