DIP Smart Accelerated Traffic-Capture Network Card: High-Performance Capture Solution Based on an FPGA Programmable Network Card FW-uNIC1020P
FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
Specification Snapshot
Network Interface
2/4 *10GE/GE(SFP+);2*100GE/40GE(QSFP28/QSFP+)
Supported Systems
Linux
Network Interface [Product Series]
2*10G/2.5G POS
Main Unit Interface [Product Series]
PCIE3.0*8
Memory [Product Series]
8GB DDR4
Dimensions [Product Series]
68.9 mm x 111.15mm, Half-Height Half-Length
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Overview
FPGA-specific network hardware acceleration, Linux programmability,100G traffic offload and OVS offload. FPGA advances enable a combined hardware/software high-performance traffic-capture solution replacing standard-NIC DPDK+Hyperscan. Lower memory I/O and CPU use support line-rate packet capture and selected service offloads,with API-based subsequent processing. It enables dense traffic-analysis computation on standard servers,especially domestic hardware platforms. The supplied final sentence stops after describing relatively low full-traffic acquisition performance and insufficient stability on domestic platforms.
Specifications
| Parameter | Value |
|---|---|
| Key Features | Zero-Loss Packet Capture for All Frame Sizes; Line-Rate Packet Transmission for All Frame Sizes; Nanosecond-Precision Timestamps; Packet Slicing, Deduplication and Other Preprocessing; Large Onboard Memory Buffer Ensures Packet Transmission during Congestion; Multiport Traffic with the Same Source and Destination Is Delivered to X86 Multicore Queues |
| Network Interface | 2/4 *10GE/GE(SFP+);2*100GE/40GE(QSFP28/QSFP+) |
| Host Queue | 16 Queues; Multiport Traffic with the Same Source and Destination Is Load-Balanced across Queues |
| Packet Support | Supports 2 VLAN Layers and 4 MPLS Label Layers; VxLAN, GRE/GTP/L2TP/PPTP/PPPOE and Other Tunnel Packets; IPv4, IPv6, ICMP, SCTP and Others |
| Load Strategy | SIP, SIP+SP, DIP, DIP+DP, SDIP, SDIP+SDP, VLAN, ROUND ROBIN, Broadcast and Other Policies |
| Matching Conditions | Source IP, Destination IP, Protocol Type, Source Port, Destination Port; VLAN ID; Input Interface Number; Packet Length; MPLS Label; Inner or Outer Layer Selectable When Matching Tunnel Packets |
| Matching Action | Discard; Forward to Port; Forward to Host (Receive Queue) |
| Supported Systems | Linux |
| Interface API | uuSDK |
| Chip Type [Product Series] | FPGA Chip |
| Network Interface [Product Series] | 2*10G/2.5G POS |
| Main Unit Interface [Product Series] | PCIE3.0*8 |
| Memory [Product Series] | 8GB DDR4 |
| Dimensions [Product Series] | 68.9 mm x 111.15mm, Half-Height Half-Length |
| Main Chip [Product Series] | Intel Arria10 FPGA |
| Heat Dissipation Method [Product Series] | Passive Heat Dissipation by Onboard Heat Sink |
| Application Scenarios [Product Series] | Suitable for High-Performance Traffic Capture and Forwarding with Relatively Simple Services and High Heat-Dissipation Requirements, Such as Session Flow-Table Accelerated Forwarding, SDH Link Protocol Conversion and High-Performance Packet Transmit/Receive RSS Distribution |
Key Features
Standard PCIe Card,POS Conversion,Collection/Filtering/Aggregation/Distribution/Load Balancing/Replication,Replaces DPDK/Hyperscan;L2–L7 Filters,Regex Acceleration,Timestamp Tags,Wire-Speed Capture,Low Host CPU/Memory;Real-Network Tests Claim2–3x System Performance,Fewer Servers/Rack Space/Power/Cooling/Management/OPEX;Forwarding:Static buff ring Reduces Host desc ring Reads/Reuses Bandwidth for Capture,Less Host Memory/CPU Interference,Centralized Release Avoids Repeated Small ring bell I/O/CPU Costs;Domestic CPU/NUMA Memory-Wall Support:Pipelined Access Reduces Latency/Improves DMA to Claimed INTEL-Equivalent Capture;True Zero Copy:Unlike Standard DPDK Dynamic Buffer Allocation/Release and Copies for Slow Backends,Large Configurable Queues Hold pkt buffers for Processing before Release;Hardware PTP Timestamps More Accurate than Host Software and Reduce CPU Time Reads;Session/Policy Forwarding:Firewall/IDS/IPS Often Need Little Traffic,Card Preprocessing Forwards Normal Traffic/Uploads Only Relevant Portion,Saving CPU/I/O;Full RSS:Parses MPLS/GRE Tunnels,Extracts Correct Five-Tuple,Same-Flow Affinity to Same CPU Queue,Improving Cache Consistency/Avoiding Dedicated Receive Core/Redistribution;Custom Programmable Server Offload
Datasheet
Product Datasheet
PDF
Supplier Information
Guangzhou Ruidong Electronic Technology Co., Ltd. is a high-tech enterprise specializing in the R&D, production, and sales of fiber optic communication equipment and components. Its products include optical transceivers, passive optical devices, CWDM/DWDM equipment, optical protection devices, fiber amplifiers, network taps, etc., applied in data centers, network security, power, transportation, finance, education, energy, and other industries. The company takes technological innovation as its core, and its products are widely praised for high reliability and stability.
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